kit

commit 5cb35a4c2f608f36882882771ab3ddc82739aa05
parent 93bc4aec2e52e64e939a101494e4b3c83152e220
Author: Ryan Sepassi <rsepassi@gmail.com>
Date:   Fri, 29 May 2026 14:34:57 -0700

doc: reconcile completeness checkboxes with committed work

The Tier 0/Tier 2 entries still showed [ ] for items completed mid-session
(only the bottom 'Standalone as encode' section had been updated), contradicting
that section. Mark done: aa64 FP/bitfield/DP1/register-offset DECODE, aa64
FP/bitfield/sub-word ENCODE; mark partial [~]: rv64 asm relocations (branches/
jumps done, call/la pseudos remain), aa64 byte/half ldst (pre/post-index
remains), aa64 atomics-bitfield group (bitfield/clz/rev done, atomics remain).

Diffstat:
M
doc/NATIVE_ARCH_COMPLETENESS.md
 | 
30
++++++++++++++++--------------

1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/doc/NATIVE_ARCH_COMPLETENESS.md b/doc/NATIVE_ARCH_COMPLETENESS.md
@@ -22,10 +22,11 @@ whole-module link model).
   sequence; `test-coff` green). `aa_tls_addr_of_win` mirrors x64.
 - [x] **rv64 TLS-IE reloc unhandled → hard link failure** — DONE (rv64 now emits
   Local-Exec TPREL like aa64/x64; `test-rv64-tls-link` regression added).
-- [ ] **rv64 assembler emits no relocations** — `assemble_one`
-  (`src/arch/rv64/asm.c:292`) routes every branch/jump/call/lui/auipc immediate
-  through `asm_driver_parse_const`, which panics on any symbol. `beq a0,a1,label`
-  / `j label` / `call f` cannot be assembled. Mirror aa64/x64 symbolic-branch path.
+- [~] **rv64 assembler emits no relocations** — DONE for symbolic branches/jumps
+  (`beq a0,a1,label`, `j label`, `jal ra,func` now emit `R_RV_BRANCH`/`R_RV_JAL`
+  via `rv_reloc_target`; `rv64_branch_sym` corpus case). REMAINING: `call/tail`
+  and `la/lla` multi-word pseudos + `%hi/%lo/%pcrel` modifier syntax (see the
+  "Standalone `as` encode" section).
 
 ## Tier 1 — correctness bugs (wrong output, in scope)
 
@@ -35,19 +36,20 @@ whole-module link model).
 
 ## Tier 2 — codegen emits but disasm/asm can't handle (round-trip violations)
 
-- [ ] **aa64 disasm: FP/SIMD data-processing family undecodable** → `.inst`
-  (no FP-DP rows in `src/arch/aa64/isa.c`). Any aa64 float code mis-renders in
-  objdump + JIT debugger on all 3 OSes. (Also: integer register-offset
-  `ldr/str [xn, xm, lsl#s]` is undecodable — same isa.c gap.)
+- [x] **aa64 disasm: FP/SIMD data-processing family undecodable** — DONE
+  (FP-DP/CMP/CVT/INT-CVT rows + integer DP1/bitfield + register-offset `ldr/str
+  [xn, xm, lsl#s]` decode added to `src/arch/aa64/isa.c`; byte-match vs
+  llvm-objdump; `aa64_fp_bitfield_dp1` decode corpus case).
 - [x] **x64 disasm: SSE `movd/movq` (66 0F 6E/7E), `xorps/xorpd` (0F 57)** — DONE
   (table rows + `print_xmm_rr` 7E reversed-order handling; matches llvm-objdump;
   decode corpus case added).
-- [ ] **aa64 asm: no FP-scalar instrs** (shares the isa.c table with the disasm gap).
-- [ ] **aa64 asm: no byte/half loads/stores** (`ldrb/strb/ldrh/strh/ldrsb/ldrsh/ldrsw`);
-  also no pre/post-index parsing (`src/arch/aa64/asm.c:938`).
-- [ ] **aa64 asm: no atomics / exclusive / bitfield / clz / rev** — codegen emits
-  these (`aa_ldxr/aa_stxr/aa_ldar/aa_sbfm/aa_ubfm/aa_clz/aa_rbit/aa_rev`) but
-  neither asm nor disasm handle them.
+- [x] **aa64 asm: FP-scalar instrs** — DONE (see "Standalone `as` encode").
+- [~] **aa64 asm: byte/half loads/stores** — DONE for `ldrb/strb/ldrh/strh/
+  ldrsb/ldrsh/ldrsw`; REMAINING: pre/post-index `[Xn,#i]!` / `[Xn],#i` parsing
+  (`src/arch/aa64/asm.c`).
+- [~] **aa64 asm: atomics / exclusive / bitfield / clz / rev** — bitfield
+  (`sbfm/ubfm/bfm`) + `clz/rbit/rev/rev16` DONE (encode + decode); REMAINING:
+  atomics/exclusive (`ldxr/stxr/ldar/stlr/cas/...`) encode.
 - [ ] **x64 asm: memory operands only `disp(%base)`** — no SIB index/scale, no
   `(%rip)` (`src/arch/x64/asm.c:193`). Disasm of cg output not reassemblable.
 - [ ] **x64 asm: ALU reg→mem / imm→mem store forms** unsupported (`asm.c:701,793`).