commit 5bf772ce3ffc905db1ca33fd61b7fa24fea4678b
parent b741e2c5b1dfa6bffa2e0a4a4723e602d8919208
Author: Ryan Sepassi <rsepassi@gmail.com>
Date: Fri, 29 May 2026 13:37:31 -0700
doc: mark native-arch completeness progress (5 of Tier 0-2 done)
Diffstat:
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/doc/NATIVE_ARCH_COMPLETENESS.md b/doc/NATIVE_ARCH_COMPLETENESS.md
@@ -18,15 +18,10 @@ whole-module link model).
## Tier 0 — correctness blockers (broken today, in scope)
-- [ ] **aa64 Windows/COFF TLS codegen** — `aa_tls_addr_of` (`src/arch/aa64/native.c:1787`)
- panics `unsupported TLS object format` for COFF; this *fails `make test-coff`*
- (the aarch64-windows runtime `coro.c` uses `_Thread_local`). The COFF SECREL
- reloc + TLS-directory + `_tls_index` infra already exist; only codegen is
- missing. x64 has the analogue (`x64_tls_addr_of_win64`, `native.c:2538`).
-- [ ] **rv64 TLS-IE reloc unhandled → hard link failure** — under `-fPIE` (the
- default) rv64 emits `R_RV_TLS_GOT_HI20`, which the linker cannot lay out or
- apply (`link: unsupported reloc kind 80`). Fix: emit Local-Exec (`R_RV_TPREL_*`)
- like aa64/x64 (`src/arch/rv64/native.c:2134`).
+- [x] **aa64 Windows/COFF TLS codegen** — DONE (commit: aa64 Windows TLS LE
+ sequence; `test-coff` green). `aa_tls_addr_of_win` mirrors x64.
+- [x] **rv64 TLS-IE reloc unhandled → hard link failure** — DONE (rv64 now emits
+ Local-Exec TPREL like aa64/x64; `test-rv64-tls-link` regression added).
- [ ] **rv64 assembler emits no relocations** — `assemble_one`
(`src/arch/rv64/asm.c:292`) routes every branch/jump/call/lui/auipc immediate
through `asm_driver_parse_const`, which panics on any symbol. `beq a0,a1,label`
@@ -34,17 +29,19 @@ whole-module link model).
## Tier 1 — correctness bugs (wrong output, in scope)
-- [ ] **x64 `.eh_frame` wrong DWARF reg for RBP** — passes `X64_RBP` (HW enc 5 =
- DWARF RDI) into CFI instead of DWARF reg 6 (`src/arch/x64/native.c:1696`).
- Corrupts frame-pointer unwinding on x64-Linux. Needs HW→DWARF reg map.
+- [x] **x64 `.eh_frame` wrong DWARF reg for RBP** — DONE (`x64_dwarf_from_hw_gpr`
+ maps HW→DWARF before CFI emit; cfi_unit.c x64 case + reg-map asserts added;
+ llvm-dwarfdump confirms RBP, not RDI).
## Tier 2 — codegen emits but disasm/asm can't handle (round-trip violations)
- [ ] **aa64 disasm: FP/SIMD data-processing family undecodable** → `.inst`
(no FP-DP rows in `src/arch/aa64/isa.c`). Any aa64 float code mis-renders in
- objdump + JIT debugger on all 3 OSes.
-- [ ] **x64 disasm: SSE `movd/movq` (66 0F 6E/7E), `xorps/xorpd` (0F 57) missing**
- → 1-byte `.byte` fallback desyncs the whole stream (`src/arch/x64/isa.c:250`).
+ objdump + JIT debugger on all 3 OSes. (Also: integer register-offset
+ `ldr/str [xn, xm, lsl#s]` is undecodable — same isa.c gap.)
+- [x] **x64 disasm: SSE `movd/movq` (66 0F 6E/7E), `xorps/xorpd` (0F 57)** — DONE
+ (table rows + `print_xmm_rr` 7E reversed-order handling; matches llvm-objdump;
+ decode corpus case added).
- [ ] **aa64 asm: no FP-scalar instrs** (shares the isa.c table with the disasm gap).
- [ ] **aa64 asm: no byte/half loads/stores** (`ldrb/strb/ldrh/strh/ldrsb/ldrsh/ldrsw`);
also no pre/post-index parsing (`src/arch/aa64/asm.c:938`).
@@ -54,12 +51,13 @@ whole-module link model).
- [ ] **x64 asm: memory operands only `disp(%base)`** — no SIB index/scale, no
`(%rip)` (`src/arch/x64/asm.c:193`). Disasm of cg output not reassemblable.
- [ ] **x64 asm: ALU reg→mem / imm→mem store forms** unsupported (`asm.c:701,793`).
-- [ ] **x64 dwarf: no named params/locals** — `frame_slot_debug_loc = NULL`
- (`src/arch/x64/native.c:3746`). gdb/lldb can't print locals. (DBG_TODO.md:153)
-- [ ] **rv64 dwarf: no named params/locals** — same NULL hook (`rv64/native.c:3240`).
+- [x] **x64 dwarf: no named params/locals** — DONE (`x64_frame_slot_debug_loc`).
+- [x] **rv64 dwarf: no named params/locals** — DONE (`rv_frame_slot_debug_loc`);
+ both now byte-identical to aa64's DWARF for the same source.
- [ ] **x64 dwarf: step-out can't recover RA** — `cfree_dwarf_unwind_step` has no
memory provider, and x64 has no link-register fallback. Needs a mem-reading
- unwind variant.
+ unwind variant. (Compounded by the JIT debugger not populating eh_frame for
+ in-process images; deferred — debugging-UX robustness, has test-infra deps.)
## Tier 3 — minor correctness / robustness
