commit 439a6d35ca041e458890b3949375adfd71862667
parent 0986a6b96213303cda7b342b773bb15889415949
Author: Ryan Sepassi <rsepassi@gmail.com>
Date: Wed, 17 Jun 2026 06:11:18 -0700
doc(ARM32): AEABI self-build done — full rt builds with kit-as
Update the Core checklist + §3 status: 'kit-self-built rt with no exclusions' is
now [x] (AEABI + coro both self-build via kit-as, incl. the cross-object BL
relocation fix). Remaining core: the coroutine runtime fault, kit-compiled reset
stub, .ARM.attributes, and inline-asm real mnemonics via asm.c.
Diffstat:
| M | doc/plan/ARM32.md | | | 70 | +++++++++++++++++++++++++++++++++++++++------------------------------- |
1 file changed, 39 insertions(+), 31 deletions(-)
diff --git a/doc/plan/ARM32.md b/doc/plan/ARM32.md
@@ -8,11 +8,12 @@ baremetal case). `test-smoke-arm32` is 4/4. The five edge reds + inline-asm
case 20 were each fixed correct-by-construction (see "Residual reds" below; two
were misdiagnosed in the plan — 123/O0 was a wide-value-in-scratch bug and
140/O1 an indexed-aggregate-move bug, both fixed in the shared codegen so they
-benefit every 32-bit target). The §3 toolchain is now PARTIAL: `kit as` self-
-builds the coroutine rt layer (save/restore asm verified under qemu), with the
-AEABI alias layer (GNU numeric local labels), the full coro runtime fault, the
-kit-compiled reset stub, and `.ARM.attributes` remaining. See the §3 status and
-"Remaining work" below.
+benefit every 32-bit target). On §3, `make rt-arm-eabi-thumb2` now self-builds
+the **whole** runtime with kit's own assembler — AEABI + coro, no exclusions
+(the exit criterion), including a cross-object-branch relocation fix in kit-as.
+Remaining: the full coroutine *runtime* faults at run time (a coro/coro.c-level
+issue), the kit-compiled reset stub, and `.ARM.attributes`. See the Core
+checklist and §3 status below.
## Core checklist — remaining items (single source of truth)
@@ -22,10 +23,6 @@ that are explicitly out of "core" scope. This list is authoritative; the prose
are now checked there too).
**Core — outstanding** (all are §3 toolchain / §2 inline asm):
-- [ ] **AEABI alias layer self-build** — re-enable `RT_arm-eabi-thumb2_AEABI =
- thumb2`. Blocked on **GNU numeric local labels** (`1:` / `1f` / `1b`) in
- `kit as`, which the soft-float compare helpers (`DEFINE_AEABI_DCMP/FCMP`)
- use. Everything else in `aeabi_thumb2.S` already assembles with kit.
- [ ] **Full coroutine runtime** — `coro_init`/`coro_resume`/`coro_yield` faults
on bare-metal arm32 (a `coro/coro.c`-level static-stack/TLS layout
interaction; the switch/trampoline asm itself is byte-correct and
@@ -47,11 +44,19 @@ are now checked there too).
- [x] Unified wide/addressing memory layer; i64/wide stores to global/frame
(§1). [x] Tail/sibling calls, `@memmove`, varargs edge cases, wide hint
intrinsics (§2). [x] The five -O0/-O1 edge reds 112/123/124/140/154.
- [x] Inline-asm operand binding (case 20 green). [x] coro **layer** self-
- builds with kit-as (save/restore verified). [x] `kit as` hardening: cmp/mov
- `#imm`, SP-relative add/str/ldr + high-reg T3, UDF, `;` separator,
- `#imm`-in-macro, `__ELF__`/empty `__USER_LABEL_PREFIX__`, soft-float
- `__ARM_FP` undefined.
+ [x] Inline-asm operand binding (case 20 green).
+- [x] **Full rt self-build (AEABI + coro, no exclusions)** — `make
+ rt-arm-eabi-thumb2` builds the whole runtime with kit's own assembler. All
+ 19 `__aeabi_*` entry points assemble with correct encodings; the dcmp/fcmp
+ compare helpers run correctly under qemu via an external direct call.
+ Enablers: `kit as` hardening (cmp/mov `#imm`, SP-relative add/str/ldr +
+ high-reg T3, UDF, `;` separator, `#imm`-in-macro, `__ELF__`/empty
+ `__USER_LABEL_PREFIX__`, soft-float `__ARM_FP` undefined); per-cond named
+ labels instead of GNU numeric locals; `__divmodsi4` added to the rt; and
+ the **cross-object BL/B.W/Bcc.W relocation fix** (assembler placeholders now
+ match codegen — the first kit-assembled cross-object branches to run).
+ The coro **layer** self-builds (save/restore verified via setjmp/longjmp);
+ only the full coroutine runtime (above) is still open.
**Follow-on variants / polish** (NOT required for "core"; the `variant` seam, §4/§5):
- [ ] Hard-float (FPv4-SP, `arm-none-eabihf`): VFP codegen + softfp/hard axis.
@@ -123,25 +128,28 @@ baremetal case). Each red was fixed correct-by-construction, not patched:
-O0 and -O1 (native.c). (Empty templates run on the existing minimal runner;
routing real mnemonics through the descriptor-driven asm.c stays a follow-on.)
-### §3 toolchain — PARTIAL (2026-06-17)
-`kit as` is substantially hardened toward self-building the full rt:
+### §3 toolchain — full rt self-builds (2026-06-17)
+`make rt-arm-eabi-thumb2` now builds the **whole** runtime with kit's own
+assembler — AEABI alias layer + coroutine layer, no exclusions (the §3 exit
+criterion). Enablers:
- **Assembler/CPP for hand-written asm**: cmp/mov modified-immediate; SP-relative
add/str/ldr incl. the 32-bit T3 form for a high transfer register; UDF; `;`
GNU statement separator; `#imm`-in-macro under `__ASSEMBLER__`; `__ELF__` +
empty `__USER_LABEL_PREFIX__` (so compiler-rt's assembly.h takes the ELF path,
- not COFF); `__ARM_FP` left undefined on soft-float.
-- **Coro layer self-builds** (`RT_arm-eabi-thumb2_CORO = arm32`): coro/arm32.c +
- coro/coro.c assemble/compile with kit; the save/restore asm is verified correct
- under qemu (setjmp/longjmp round-trips at -O0/-O1). **Known issue:** the full
- coro_init/resume/yield path still faults on bare-metal arm32 (a coro/coro.c-
- level static-stack/TLS layout interaction surfaced now that the layer builds;
- the switch/trampoline disassemble byte-correct).
+ not COFF); `__ARM_FP` left undefined on soft-float; and the **cross-object
+ BL/B.W/Bcc.W relocation fix** (the assembler's branch placeholders now match
+ codegen's encoders — the first kit-assembled cross-object branches to be linked
+ and run, the bare-metal reset stub being clang-assembled).
+- **AEABI** (`RT_arm-eabi-thumb2_AEABI = thumb2`): all 19 `__aeabi_*` assemble
+ with correct encodings; per-cond named labels replace GNU numeric locals;
+ `__divmodsi4` added to the rt; dcmp/fcmp verified under qemu via direct call.
+- **Coro layer** (`RT_arm-eabi-thumb2_CORO = arm32`): coro/arm32.c + coro/coro.c
+ assemble/compile with kit; save/restore verified (setjmp/longjmp round-trips).
+ **Known issue:** the full coro_init/resume/yield path still faults on bare-metal
+ arm32 (a coro/coro.c-level static-stack/TLS layout interaction; the
+ switch/trampoline disassemble byte-correct).
### Still TODO (Remaining work, below)
-- §3 **AEABI alias layer self-build** — blocked on GNU numeric local labels
- (`1:`/`1f`/`1b`) in `kit as`, which the soft-float compare helpers
- (DEFINE_AEABI_DCMP/FCMP) use. Everything else in aeabi_thumb2.S now assembles
- with kit (the `;`/`#imm`/`__ELF__`/SP-addressing fixes above).
- §3 the full coro runtime fault (above), the **kit-compiled** Cortex-M reset
stub, and `.ARM.attributes` emission.
- §2 route `asm_block` real mnemonics through the descriptor-driven `asm.c`.
@@ -244,10 +252,10 @@ names the design, not a workaround.
checklist, top).
### 3. Toolchain / runtime completeness
-- [ ] **kit-self-built rt with no exclusions** — PARTIAL: the coroutine layer
- (`CORO` in `mk/rt.mk`) now self-builds with kit-as; the AEABI alias layer
- (`AEABI`) is still clang-only, blocked on GNU numeric local labels (Core
- checklist, top). The full coroutine runtime also still faults at run time.
+- [x] **kit-self-built rt with no exclusions** — `make rt-arm-eabi-thumb2`
+ builds the full runtime (AEABI + coro) with kit-as. The coroutine *runtime*
+ still faults (Core checklist, top), but the build self-builds with no
+ clang-assembled sources.
- [ ] **Multi-threaded TLS** — replace single-thread TLS-as-static with a real
variant-I tp-relative model (software thread pointer + reset-stub seed).
