commit 3bbb10f66899268262d8993ffd1f44a4b864e2df
parent 5b8c7a74d0fd81536a83f27676a6738bfd7a1be0
Author: Ryan Sepassi <rsepassi@gmail.com>
Date: Fri, 29 May 2026 15:42:32 -0700
doc: mark native-arch asm/link completeness items done
Records this session's work: rv64 pseudos + %hi/%lo/%pcrel + ULEB128 link;
aa64 ldst addressing modes + atomics/LSE + mov-bitmask + ldrs* decode + :lo12:/
:got: reloc operators; x64 SIB/(%rip)/stores + sym(%rip)/@PLT/@GOTPCREL. All
byte- and reloc-identical to llvm-mc. Remaining items (TLS modifiers, .L labels,
niche LSE ops + their disasm rows, x64 debugger step-out) noted as niche/deferred.
Diffstat:
1 file changed, 60 insertions(+), 34 deletions(-)
diff --git a/doc/NATIVE_ARCH_COMPLETENESS.md b/doc/NATIVE_ARCH_COMPLETENESS.md
@@ -22,11 +22,13 @@ whole-module link model).
sequence; `test-coff` green). `aa_tls_addr_of_win` mirrors x64.
- [x] **rv64 TLS-IE reloc unhandled → hard link failure** — DONE (rv64 now emits
Local-Exec TPREL like aa64/x64; `test-rv64-tls-link` regression added).
-- [~] **rv64 assembler emits no relocations** — DONE for symbolic branches/jumps
- (`beq a0,a1,label`, `j label`, `jal ra,func` now emit `R_RV_BRANCH`/`R_RV_JAL`
- via `rv_reloc_target`; `rv64_branch_sym` corpus case). REMAINING: `call/tail`
- and `la/lla` multi-word pseudos + `%hi/%lo/%pcrel` modifier syntax (see the
- "Standalone `as` encode" section).
+- [x] **rv64 assembler emits no relocations** — DONE. Symbolic branches/jumps
+ (`beq a0,a1,label`, `j label`, `jal ra,func` → `R_RV_BRANCH`/`R_RV_JAL` via
+ `rv_reloc_target`; `rv64_branch_sym`); `call`/`tail` (→ `R_RV_CALL`), `la`/`lla`
+ (→ `R_RV_PCREL_HI20`+`R_RV_PCREL_LO12_I` via a `.LpcrelHi` anchor) and multi-word
+ `li` (`rv64_call_tail`/`rv64_la_lla`/`rv64_li_multi`); and `%hi/%lo/%pcrel_hi/
+ %pcrel_lo/%got_pcrel_hi` modifier syntax (`rv64_reloc_modifiers`). All byte- and
+ reloc-identical to llvm-mc (verified via `llvm-objdump -r` on the emitted object).
## Tier 1 — correctness bugs (wrong output, in scope)
@@ -44,15 +46,23 @@ whole-module link model).
(table rows + `print_xmm_rr` 7E reversed-order handling; matches llvm-objdump;
decode corpus case added).
- [x] **aa64 asm: FP-scalar instrs** — DONE (see "Standalone `as` encode").
-- [~] **aa64 asm: byte/half loads/stores** — DONE for `ldrb/strb/ldrh/strh/
- ldrsb/ldrsh/ldrsw`; REMAINING: pre/post-index `[Xn,#i]!` / `[Xn],#i` parsing
- (`src/arch/aa64/asm.c`).
-- [~] **aa64 asm: atomics / exclusive / bitfield / clz / rev** — bitfield
- (`sbfm/ubfm/bfm`) + `clz/rbit/rev/rev16` DONE (encode + decode); REMAINING:
- atomics/exclusive (`ldxr/stxr/ldar/stlr/cas/...`) encode.
-- [ ] **x64 asm: memory operands only `disp(%base)`** — no SIB index/scale, no
- `(%rip)` (`src/arch/x64/asm.c:193`). Disasm of cg output not reassemblable.
-- [ ] **x64 asm: ALU reg→mem / imm→mem store forms** unsupported (`asm.c:701,793`).
+- [x] **aa64 asm: byte/half loads/stores** — DONE incl. pre/post-index
+ `[Xn,#i]!` / `[Xn],#i` and register-offset `[Xn,Xm{,LSL#s}]` / `[Xn,Wm,SXTW]`
+ (`aa64_ldst_regoff`, `aa64_ldst_pre_post_index`; new `AA64LdStRegOff`/`WBack`
+ encoders in `isa.h`).
+- [x] **aa64 asm: atomics / exclusive / bitfield / clz / rev** — DONE. bitfield
+ (`sbfm/ubfm/bfm`) + `clz/rbit/rev/rev16`; and exclusive (`ldxr/stxr/ldaxr/
+ stlxr`), acquire/release (`ldar/stlr`), `cas{,a,l,al}`, and LSE (`swp/ldadd/
+ ldclr/ldeor/ldset` + a/l/al + b/h) atomics (`aa64_exclusive_load_store`,
+ `aa64_load_acquire_store_release`, `aa64_compare_and_swap`, `aa64_lse_atomics`;
+ new `AA64LdStEx`/`Cas`/`LseAtomic` encoders). REMAINING (niche, deferred):
+ `CASP`, LSE min/max (`ldsmax/ldsmin/ldumax/ldumin`), `LDAPR`/`STLLR`, and
+ disasm rows for these encode-only forms (they render as `.inst`).
+- [x] **x64 asm: memory operands only `disp(%base)`** — DONE. Full AT&T
+ `disp(%base,%index,scale)`, index-only, and (numeric + symbolic) `(%rip)`
+ (`x64_memop_sib_load`, `x64_memop_rip`; reuses `x64_pack_mem_sib`).
+- [x] **x64 asm: ALU reg→mem / imm→mem store forms** — DONE (`/r` reg-to-rm and
+ group-1 `imm`-to-rm stores; `x64_memop_alu_store`, `x64_memop_mov_store`).
- [x] **x64 dwarf: no named params/locals** — DONE (`x64_frame_slot_debug_loc`).
- [x] **rv64 dwarf: no named params/locals** — DONE (`rv_frame_slot_debug_loc`);
both now byte-identical to aa64's DWARF for the same source.
@@ -68,14 +78,20 @@ whole-module link model).
override in `src/arch/mc.c`; all archs now pin rules to the post-prologue PC).
- [x] shared asm: `.comm/.lcomm`/`.uleb128/.sleb128` — DONE (were silent
miscompiles; LEB128 now matches llvm-mc byte-for-byte).
-- [ ] aa64 asm: `mov Rd,#bitmask-imm` via ORR alias (matches GNU as). NICHE —
- GNU as itself rejects most `mov #bigimm`; only the logical-bitmask form.
-- [ ] rv64 asm: `call/tail/la/lla` pseudos + multi-word `li` (multi-word emit).
-- [ ] asm: no relocation-operator operand syntax (`@PLT/@GOTPCREL/:lo12:/%hi/%pcrel_hi`)
- on any arch (LARGE; the bulk of remaining T2-asm).
-- [ ] rv64 link: `R_RV_SET_ULEB128/SUB_ULEB128` mapped on read but unsized/unapplied
- (only blocks ingesting *external* rv64 objects with ULEB128 diff relocs; cfree
- never emits them).
+- [x] aa64 asm: `mov Rd,#bitmask-imm` via ORR alias — DONE (`mov` falls back to
+ `orr Rd,zr,#bitmask` via `aa64_logimm_encode` when not movz/movn-encodable;
+ `aa64_mov_orr_bitmask`).
+- [x] rv64 asm: `call/tail/la/lla` pseudos + multi-word `li` — DONE (see Tier 0).
+- [x] asm: relocation-operator operand syntax — DONE on all three arches:
+ aa64 `:lo12:`/`:got:`/`:got_lo12:` (`aa64_reloc_modifiers`), rv64 `%hi`/`%lo`/
+ `%pcrel_hi`/`%pcrel_lo`/`%got_pcrel_hi` (`rv64_reloc_modifiers`), x64 `sym(%rip)`/
+ `@PLT`/`@GOTPCREL` (`x64_reloc_modifiers`). All byte- and reloc-identical to
+ llvm-mc incl. addends. REMAINING (niche): TLS variants (`:tprel_*:`,
+ `%tls_*`), and `.L`-prefixed local-label spellings in operand references (a
+ shared-lexer concern; plain labels work, e.g. as the `%pcrel_lo` anchor).
+- [x] rv64 link: `R_RV_SET_ULEB128/SUB_ULEB128` — DONE (apply path re-encodes
+ the ULEB128 field in place to its original byte width; `test-link-reloc-uleb128`
+ drives `link_reloc_apply` with values from a real `clang -g` rv64 object).
## Tier 4 — test coverage (no behavior change; lock in the above)
@@ -102,17 +118,27 @@ Done (all byte-identical to clang/llvm-mc, with default-suite corpus cases):
- [x] aa64 bitfield (`sbfm/ubfm/bfm`) + DP1 (`clz/rbit/rev/rev16`).
- [x] aa64 byte/half + signed sub-word ldst (`ldrb/strb/ldrh/strh/ldrsb/ldrsh/
ldrsw`).
-
-Remaining:
-- [ ] aa64 asm encode: atomics/exclusive (`ldxr/stxr/ldar/stlr/cas/...`),
- register-offset `[Xn, Xm, LSL #s]`, pre/post-index `[Xn, #i]!` / `[Xn], #i`.
-- [ ] x64 asm encode: SIB index/scale + `(%rip)` memory operands, ALU reg→mem /
- imm→mem stores. (`(%rip)` entangles with reloc-operator syntax for `sym(%rip)`.)
-- [ ] Relocation-operator operand syntax (`:lo12:`/`%hi`/`@GOTPCREL`/…) on all
- archs — the largest, cross-cutting piece; gates PIC/GOT/TLS hand-written asm.
-- [ ] rv64 `call/tail/la/lla` pseudos + multi-word `li` (needs multi-word emit).
-- [ ] ldrsb/ldrsh/ldrsw DECODE rows (encode done; signed sub-word loads still
- render as `.inst`).
+- [x] aa64 ldst addressing modes: register-offset `[Xn, Xm, LSL #s]` /
+ `[Xn, Wm, SXTW]`, pre/post-index `[Xn, #i]!` / `[Xn], #i`.
+- [x] aa64 atomics/exclusive (`ldxr/stxr/ldaxr/stlxr/ldar/stlr/cas{,a,l,al}`)
+ and LSE (`swp/ldadd/ldclr/ldeor/ldset` + a/l/al + b/h).
+- [x] aa64 `mov Rd,#bitmask` via ORR alias.
+- [x] x64 SIB index/scale + numeric/symbolic `(%rip)` memory operands, ALU
+ reg→mem / imm→mem stores, MOV imm→mem.
+- [x] Relocation-operator operand syntax on all three archs: aa64
+ `:lo12:`/`:got:`/`:got_lo12:`, rv64 `%hi`/`%lo`/`%pcrel_hi`/`%pcrel_lo`/
+ `%got_pcrel_hi`, x64 `sym(%rip)`/`@PLT`/`@GOTPCREL` (byte- and reloc-identical
+ to llvm-mc incl. addends).
+- [x] rv64 `call/tail/la/lla` pseudos + multi-word `li`.
+- [x] ldrsb/ldrsh/ldrsw DECODE rows (`aa64_ldrs_subword`).
+
+Remaining (niche / deferred, none block any build):
+- [ ] aa64 atomics: `CASP`, LSE min/max (`ldsmax/ldsmin/ldumax/ldumin`),
+ `LDAPR`/`STLLR`; and disasm rows for the new encode-only atomics / register-
+ offset / writeback forms (round-trip would currently print `.inst`).
+- [ ] TLS relocation modifiers (`:tprel_*:` / `%tls_*`) and `.L`-prefixed
+ local-label spellings in operand references (shared-lexer change).
- [ ] x64 debugger step-out RA recovery (needs a memory-reading unwind variant;
also blocked on the JIT debugger not populating `.eh_frame` for in-process
- images).
+ images). Tracks the same root cause as the Tier-2 "x64 dwarf: step-out" item;
+ both remain deferred on test-infra dependencies.
