commit 0b51b30098797ce891ca56c01d9d829c29530a3c
parent 95ef642fe318fd2018bfed00e494cc9513cf7336
Author: Ryan Sepassi <rsepassi@gmail.com>
Date: Sat, 25 Apr 2026 16:26:01 -0700
scheme1: 16 MB heap arena, ELF p_memsz to 32 MB
Move symtab BSS offset past the new heap region (0x20000 -> 0x1010000)
and bump ELF p_memsz from 8 MB to 32 MB across the three vendored
seed headers so the kernel actually maps the larger arena. Update
the BSS-layout comment to reflect the current sizes.
Diffstat:
4 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/scheme1/scheme1.P1pp b/scheme1/scheme1.P1pp
@@ -55,10 +55,12 @@
%struct TD { hdr name nfields } # .SIZE = 24
# Records are variable width: header + td slot + N field slots.
-# BSS arena offsets from :ELF_end. Each arena is 64 KiB; the three are
-# packed back-to-back below ELF_end + 192 KiB. p1_main's startup loop
-# materializes &ELF_end + OFF_X into the matching pointer slot. The
-# offsets are emitted directly in bss_init_tbl via $().
+# BSS arena offsets from :ELF_end. readbuf is 64 KiB, then the heap
+# (HEAP_CAP_BYTES, currently 16 MiB), then symtab. The three are packed
+# back-to-back; everything lives within the ELF p_memsz reservation
+# (currently 32 MiB) declared in vendor/seed/<arch>/ELF.hex2. p1_main's
+# startup loop materializes &ELF_end + OFF_X into the matching pointer
+# slot. The offsets are emitted directly in bss_init_tbl via $().
%macro SYMTAB_CAP_SLOTS()
1024
@@ -4832,7 +4834,7 @@
:bss_init_tbl
&readbuf_buf_ptr %(0) $(0)
&heap_buf_ptr %(0) $(0x10000)
-&symtab_buf_ptr %(0) $(0x20000)
+&symtab_buf_ptr %(0) $(0x1010000)
:bss_init_tbl_end
# =========================================================================
diff --git a/vendor/seed/aarch64/ELF.hex2 b/vendor/seed/aarch64/ELF.hex2
@@ -62,7 +62,7 @@ B7 00 # e_machine Indicating AArch64
&ELF_base 00 00 00 00 # ph_physaddr
%ELF_end>ELF_base 00 00 00 00 # ph_filesz
-00 00 80 00 00 00 00 00 # ph_memsz = 8 MB (boot2: BSS past ELF_end)
+00 00 00 02 00 00 00 00 # ph_memsz = 32 MB (boot2: BSS past ELF_end)
01 00 00 00 00 00 00 00 # ph_align
diff --git a/vendor/seed/amd64/ELF.hex2 b/vendor/seed/amd64/ELF.hex2
@@ -61,7 +61,7 @@
&ELF_base 00 00 00 00 ## p_physaddr
%ELF_end>ELF_base 00 00 00 00 ## p_filesz
-00 00 80 00 00 00 00 00 ## p_memsz = 8 MB (boot2: BSS past ELF_end)
+00 00 00 02 00 00 00 00 ## p_memsz = 32 MB (boot2: BSS past ELF_end)
01 00 00 00 00 00 00 00 ## Required alignment
diff --git a/vendor/seed/riscv64/ELF.hex2 b/vendor/seed/riscv64/ELF.hex2
@@ -61,7 +61,7 @@ F3 00 ## e_machine Indicating RISC-V
&ELF_base 00 00 00 00 ## p_physaddr
%ELF_end>ELF_base 00 00 00 00 ## p_filesz
-00 00 80 00 00 00 00 00 ## p_memsz = 8 MB (boot2: BSS past ELF_end)
+00 00 00 02 00 00 00 00 ## p_memsz = 32 MB (boot2: BSS past ELF_end)
01 00 00 00 00 00 00 00 ## Required alignment
