kit

start.c (7842B)

---

 /* Freestanding _start for Path E (ELF exec) tests.
  *
  * Convention:
  *   test_main()      — primary test body; returns 0 on pass.
  *   test_post_fini() — optional post-destructor check (weak default: 0).
  *
  * Lifecycle: TLS setup → ctors → test_main → dtors → test_post_fini → exit.
  *
  * kit-ld defines:
  *   __init_array_start/end, __fini_array_start/end — sorted ctor/dtor
  *     spans (synthesized around the corresponding SHT_*_ARRAY sections).
  *   __tdata_start, __tdata_end                     — .tdata template
  *     bytes; identical when no TLS (length 0).
  *   __tbss_size                                    — SK_ABS, holds the
  *     .tbss byte count as its symbol value.
  *
  * The TLS prologue runs unconditionally: with no TLS in the image, the
  * three boundary symbols all read as 0 and the loop is a no-op. */
 
 extern int test_main(void);
 __attribute__((weak)) int test_post_fini(void) { return 0; }
 
 typedef void (*VoidFn)(void);
 extern VoidFn __preinit_array_start[];
 extern VoidFn __preinit_array_end[];
 extern VoidFn __init_array_start[];
 extern VoidFn __init_array_end[];
 extern VoidFn __fini_array_start[];
 extern VoidFn __fini_array_end[];
 
 extern char __tdata_start[];
 extern char __tdata_end[];
 extern char __tbss_size[]; /* SK_ABS: address-of yields the byte count */
 
 /* TLS-block prologue layout — per-arch ABI dictates whether the TCB sits
  * before or after .tdata in the thread-pointer-relative image. AArch64
  * keeps a 16-byte reserved TCB; SysV-x86_64 uses TLS variant II (negative
  * offsets from the thread pointer, see below); RISC-V LP64 follows variant I
  * but points the thread pointer at the TLS image itself. */
 #define AARCH64_TCB_SIZE 16
 
 /* Per-thread TLS workspace; the test harness is single-threaded so a
  * file-scope buffer is enough. Sized generously for any test we run here. */
 static char g_tls_block[4096] __attribute__((aligned(16)));
 
 /* IFUNC startup init.  Mirrors rt/lib/kit/ifunc_init.c — duplicated
  * here so the test harness doesn't need libkit_rt.a on the link
  * line.  When the linker emits a static ET_EXEC and the image
  * contains any STT_GNU_IFUNC, layout_iplt synthesizes a .init_array
  * entry pointing at __kit_ifunc_init; the loop in _start below
  * walks .init_array and calls each entry, so this fills every
  * .igot.plt slot before test_main runs. */
 extern void* __start_iplt_pairs[] __attribute__((weak));
 extern void* __stop_iplt_pairs[] __attribute__((weak));
 void __kit_ifunc_init(void) {
   void** p = __start_iplt_pairs;
   void** end = __stop_iplt_pairs;
   if (!p || !end) return;
   for (; p < end; p += 2) {
     void* (*r)(void) = (void* (*)(void))p[0];
     void** slot = (void**)p[1];
     *slot = r();
   }
 }
 
 #if defined(__APPLE__)
 /* macOS doesn't expose a stable syscall ABI — all syscalls must go
  * through libSystem.dylib.  start.c on macOS therefore calls libc
  * `exit` rather than emitting `svc #0x80` inline; the kit Mach-O
  * exe linker resolves the import via LC_LOAD_DYLIB libSystem.B.dylib
  * and the dyld bind info / chained-fixups stream. */
 extern void exit(int) __attribute__((noreturn));
 #endif
 
 __attribute__((noreturn)) static void do_exit(int code) {
 #if defined(__APPLE__)
   exit(code);
   __builtin_unreachable();
 #elif defined(__aarch64__)
   register long x8 __asm__("x8") = 94; /* sys_exit_group */
   register long x0 __asm__("x0") = code;
   __asm__ volatile("svc #0" ::"r"(x8), "r"(x0) : "memory");
 #elif defined(__x86_64__)
   register long rax __asm__("rax") = 231; /* sys_exit_group */
   register long rdi __asm__("rdi") = code;
   __asm__ volatile("syscall" ::"r"(rax), "r"(rdi) : "memory");
 #elif defined(__riscv) && __riscv_xlen == 64
   register long a7 __asm__("a7") = 94; /* sys_exit_group */
   register long a0 __asm__("a0") = code;
   __asm__ volatile("ecall" ::"r"(a7), "r"(a0) : "memory");
 #else
 #error "start.c: unsupported architecture"
 #endif
   __builtin_unreachable();
 }
 
 static void tls_init(void) {
 #if defined(__APPLE__)
   /* On Darwin, tpidr_el0 is owned by libsystem/dyld; freestanding
    * tests don't synthesize TLS roots (31_tls_local_exec is N/A on
    * Mach-O), so the prologue is a no-op. */
   return;
 #else
   unsigned long td_n = (unsigned long)(__tdata_end - __tdata_start);
   unsigned long bs_n = (unsigned long)(unsigned long long)__tbss_size;
   unsigned long i;
   /* Launder bs_n past clang's "extern char[] has non-null address"
    * assumption — without this the .tbss zero loop is peeled and
    * unconditionally writes one byte at tls[td_n], which on the SysV
    * x86_64 variant II layout (TCB sits at tls[td_n]) clobbers the
    * thread-pointer self-pointer for any TLS image with bs_n == 0. */
   __asm__ volatile("" : "+r"(bs_n));
 #if defined(__aarch64__)
   /* Variant I (TCB first): tp -> [TCB(16) | tdata | tbss] */
   char* dst = g_tls_block + AARCH64_TCB_SIZE;
   for (i = 0; i < td_n; ++i) dst[i] = __tdata_start[i];
   for (i = 0; i < bs_n; ++i) dst[td_n + i] = 0;
   __asm__ volatile("msr tpidr_el0, %0" ::"r"(g_tls_block) : "memory");
 #elif defined(__x86_64__)
   /* SysV TLS variant II: TLS bytes at *negative* offsets from the
    * thread pointer (fs base). Lay out [tdata | tbss | TCB] where the
    * TCB self-pointer sits at offset 0. The first slot of the TCB
    * must be the thread pointer (self) per ELF ABI. */
   char* tcb = g_tls_block + sizeof(g_tls_block) - 64;
   *(void**)tcb = tcb;
   char* tls = tcb - (td_n + bs_n);
   for (i = 0; i < td_n; ++i) tls[i] = __tdata_start[i];
   for (i = 0; i < bs_n; ++i) tls[td_n + i] = 0;
   /* arch_prctl(ARCH_SET_FS, tcb): syscall 158, code 0x1002. */
   register long rax __asm__("rax") = 158;
   register long rdi __asm__("rdi") = 0x1002;
   register long rsi __asm__("rsi") = (long)tcb;
   __asm__ volatile("syscall"
                    : "+r"(rax)
                    : "r"(rdi), "r"(rsi)
                    : "rcx", "r11", "memory");
 #elif defined(__riscv) && __riscv_xlen == 64
   /* RISC-V variant I: tp points at the TLS image start and TPREL offsets are
    * relative to that address. Keep a little guard space ahead of the image,
    * but point tp at the same byte where the .tdata copy begins. */
   char* dst = g_tls_block + 16;
   for (i = 0; i < td_n; ++i) dst[i] = __tdata_start[i];
   for (i = 0; i < bs_n; ++i) dst[td_n + i] = 0;
   __asm__ volatile("mv tp, %0" ::"r"(dst) : "memory");
 #else
 #error "start.c: unsupported architecture"
 #endif
 #endif /* !__APPLE__ */
 }
 
 /* On x86_64 the kernel hands _start an rsp that is 16-aligned (so argc
  * lands on a 16-byte boundary), but clang compiles _start as an ordinary
  * function assuming the standard SysV contract of rsp ≡ 8 (mod 16) on
  * entry — off by 8. force_align_arg_pointer makes the prologue realign
  * rsp itself so every `call` downstream lands at the canonical
  * rsp ≡ 8 (mod 16). aarch64/rv64 ABIs keep SP 16-aligned at all times,
  * so no analogue is needed there. */
 #if defined(__x86_64__)
 __attribute__((force_align_arg_pointer))
 #endif
 void _start(void) {
   VoidFn* p;
   int result;
 
   tls_init();
 
 #if defined(__APPLE__)
   /* Mach-O: dyld walks __DATA,__mod_init_func before _start runs, so
    * the harness must NOT walk __init_array_start/end — the boundary
    * symbols are synthesized into the __got region (no real init array
    * on Mach-O) and dereferencing them faults. */
   (void)p;
 #else
   /* SHT_PREINIT_ARRAY runs strictly before .init_array.  kit-ld
    * lands its synthetic __kit_ifunc_init entry here so IFUNC
    * slots are filled before any user ctor or test_main runs. */
   for (p = __preinit_array_start; p != __preinit_array_end; ++p) (*p)();
   for (p = __init_array_start; p != __init_array_end; ++p) (*p)();
 #endif
 
   result = test_main();
 
 #if !defined(__APPLE__)
   for (p = __fini_array_end; p-- != __fini_array_start;) (*p)();
 #endif
 
   if (result == 0) result = test_post_fini();
 
   do_exit(result);
 }