kit

x64_inline_test.c (7389B)

---

 /* Public-API unit test for the x86_64 inline-asm backend. */
 
 #include <stdint.h>
 #include <string.h>
 
 #include "inline_public_test.h"
 
 /* Collect the architectural XMM registers named by `ucomisd %xmmN,%xmmN`.
  * The inline case below emits one such non-destructive compare per input. A
  * full mask therefore proves that all sixteen simultaneous constraints were
  * bound independently; merely compiling an empty template cannot detect an
  * accidental many-to-one placement. */
 static uint32_t x64_self_ucomisd_bindings(const uint8_t* p, size_t n,
                                           uint32_t* count_out) {
   uint32_t mask = 0;
   uint32_t count = 0;
   for (size_t i = 0; i + 3u < n; ++i) {
     size_t op = i;
     uint8_t rex = 0;
     uint8_t modrm;
     uint32_t lhs;
     uint32_t rhs;
     if (p[op++] != 0x66u) continue;
     if (op < n && p[op] >= 0x40u && p[op] <= 0x4fu) rex = p[op++];
     if (op + 2u >= n || p[op] != 0x0fu || p[op + 1u] != 0x2eu)
       continue;
     modrm = p[op + 2u];
     if ((modrm & 0xc0u) != 0xc0u) continue;
     lhs = ((modrm >> 3u) & 7u) | ((rex & 4u) ? 8u : 0u);
     rhs = (modrm & 7u) | ((rex & 1u) ? 8u : 0u);
     if (lhs != rhs) continue;
     mask |= 1u << lhs;
     ++count;
   }
   if (count_out) *count_out = count;
   return mask;
 }
 
 static void x64_body(KitCompiler* c, KitCg* cg, KitCgTypeId i64_ty) {
   KitCgAsmOperand imm;
   (void)i64_ty;
 
   it_inline_asm(c, cg, "nop ; nop", NULL, 0, NULL, 0, NULL, 0);
   it_inline_asm(c, cg, "movq %%rcx, %%rax", NULL, 0, NULL, 0, NULL, 0);
 
   kit_cg_push_int(cg, 7, i64_ty);
   imm = it_asm_op(c, "i", "imm", i64_ty, KIT_CG_ASM_IN);
   it_inline_asm(c, cg, "addq %[imm], %%rax", NULL, 0, &imm, 1, NULL, 0);
 }
 
 static void x64_bad_operand(KitCompiler* c, KitCg* cg, KitCgTypeId i64_ty) {
   (void)i64_ty;
   it_inline_asm(c, cg, "movq %9, %%rax", NULL, 0, NULL, 0, NULL, 0);
 }
 
 /* A GNU local register variable pinned to %rax — the Linux syscall idiom
  * (syscall number in rax). rax is reserved (return / div-mul), but no longer
  * an emit-internal scratch register, so an asm operand may pin it while the
  * allocator still leaves it alone. Clobbers rcx/r11 as `syscall` does. */
 static void x64_rax_pin(KitCompiler* c, KitCg* cg, KitCgTypeId i64_ty) {
   KitCgAsmOperand in;
   const char* clob[] = {"rcx", "r11", "memory"};
   in = it_asm_op(c, "r", "n", i64_ty, KIT_CG_ASM_IN);
   in.reg = kit_sym_intern(c, kit_slice_cstr("rax"));
   kit_cg_push_int(cg, 60, i64_ty); /* SYS_exit */
   it_inline_asm(c, cg, "syscall", NULL, 0, &in, 1, clob, 3);
 }
 
 static void x64_push_local_inputs(KitCompiler* c, KitCg* cg, KitCgTypeId ty,
                                   const char* constraint,
                                   KitCgAsmOperand* ins, uint32_t n) {
   KitCgLocal locals[18];
   KitCgLocalAttrs attrs;
   KitCgMemAccess mem;
   memset(&attrs, 0, sizeof attrs);
   memset(&mem, 0, sizeof mem);
   mem.type = ty;
   mem.align = kit_cg_type_align(c, ty);
   for (uint32_t i = 0; i < n; ++i) {
     locals[i] = kit_cg_local(cg, ty, attrs);
     if (ty == kit_cg_type_builtin(c, KIT_CG_BUILTIN_F64))
       kit_cg_push_float(cg, (double)i + 0.5, ty);
     else
       kit_cg_push_int(cg, i + 1u, ty);
     kit_cg_local_write(cg, locals[i], mem);
   }
   for (uint32_t i = 0; i < n; ++i) {
     kit_cg_local_read(cg, locals[i], mem);
     ins[i] = it_asm_op(c, constraint, NULL, ty, KIT_CG_ASM_IN);
   }
 }
 
 static void x64_optimized_stage(KitCompiler* c, KitCg* cg, KitCgTypeId i64_ty) {
   static const char xmm_use_template[] =
       "ucomisd %0, %0 ; ucomisd %1, %1 ; ucomisd %2, %2 ; "
       "ucomisd %3, %3 ; ucomisd %4, %4 ; ucomisd %5, %5 ; "
       "ucomisd %6, %6 ; ucomisd %7, %7 ; ucomisd %8, %8 ; "
       "ucomisd %9, %9 ; ucomisd %10, %10 ; ucomisd %11, %11 ; "
       "ucomisd %12, %12 ; ucomisd %13, %13 ; ucomisd %14, %14 ; "
       "ucomisd %15, %15";
   static const char* const cc_clobber[] = {"cc"};
   KitCgTypeId f64_ty = kit_cg_type_builtin(c, KIT_CG_BUILTIN_F64);
   KitCgAsmOperand ins[18];
   KitCgAsmOperand outs[6];
 
   x64_push_local_inputs(c, cg, i64_ty, "r", ins, 14);
   it_inline_asm(c, cg, "", NULL, 0, ins, 14, NULL, 0);
 
   x64_push_local_inputs(c, cg, i64_ty, "q", ins, 14);
   it_inline_asm(c, cg, "", NULL, 0, ins, 14, NULL, 0);
 
   /* Sixteen is the architectural XMM register count. The old spill-to-scratch
    * rewrite silently aliased simultaneous operands. Reference every input in
    * the emitted template so the byte-level check can prove that each binding
    * is distinct; an empty template only proved that planning did not panic. */
   x64_push_local_inputs(c, cg, f64_ty, "x", ins, 16);
   it_inline_asm(c, cg, xmm_use_template, NULL, 0, ins, 16, cc_clobber, 1);
 
   for (uint32_t i = 0; i < 6u; ++i)
     outs[i] = it_asm_op(c, i & 1u ? "=x" : "=r", NULL,
                         i & 1u ? f64_ty : i64_ty, KIT_CG_ASM_OUT);
   it_inline_asm(c, cg, "", outs, 6, NULL, 0, NULL, 0);
   for (uint32_t i = 0; i < 6u; ++i) kit_cg_drop(cg);
 }
 
 int main(void) {
   static const uint8_t nops[] = {0x90u, 0x90u};
   static const uint8_t movq_rcx_rax[] = {0x48u, 0x89u, 0xc8u};
   static const uint8_t addq_7_rax[] = {0x48u, 0x83u, 0xc0u, 0x07u};
   InlineTestEnv env;
   InlineText text;
 
   it_env_init(&env);
   IT_EXPECT(
       &env,
       it_emit_text(&env, KIT_ARCH_X86_64, "x64_inline_public", x64_body, &text),
       "failed to emit x64 inline-asm object");
   if (text.data) {
     IT_EXPECT(&env, it_contains(text.data, text.len, nops, sizeof nops),
               "missing two-nop inline asm encoding");
     IT_EXPECT(
         &env,
         it_contains(text.data, text.len, movq_rcx_rax, sizeof movq_rcx_rax),
         "missing movq %%rcx, %%rax literal-escape encoding");
     IT_EXPECT(&env,
               it_contains(text.data, text.len, addq_7_rax, sizeof addq_7_rax),
               "missing addq $7, %%rax immediate-substitution encoding");
   }
   it_text_close(&text);
 
   IT_EXPECT(&env,
             it_expect_panic(&env, KIT_ARCH_X86_64, "x64_bad_operand",
                             x64_bad_operand, "operand index"),
             "expected out-of-range x64 asm operand to panic");
 
   {
     static const uint8_t syscall_bytes[] = {0x0fu, 0x05u};
     InlineText sc;
     IT_EXPECT(
         &env,
         it_emit_text(&env, KIT_ARCH_X86_64, "x64_rax_pin", x64_rax_pin, &sc),
         "failed to emit rax-pinned syscall inline asm");
     if (sc.data)
       IT_EXPECT(
           &env,
           it_contains(sc.data, sc.len, syscall_bytes, sizeof syscall_bytes),
           "missing syscall encoding for rax-pinned operand");
     it_text_close(&sc);
   }
 
   {
     InlineText opt;
     uint32_t xmm_compare_count = 0;
     uint32_t xmm_bindings = 0;
     IT_EXPECT(&env,
               it_emit_text_opt(&env, KIT_ARCH_X86_64, "x64_optimized_stage",
                                x64_optimized_stage, 1, &opt),
               "failed to emit optimized x64 inline-asm staging case");
     if (opt.data)
       xmm_bindings = x64_self_ucomisd_bindings(
           opt.data, opt.len, &xmm_compare_count);
     IT_EXPECT(&env,
               xmm_compare_count == 16u && xmm_bindings == 0xffffu,
               "sixteen simultaneous XMM inputs were not independently bound "
               "(compares=%u mask=%#x)",
               xmm_compare_count, xmm_bindings);
     it_text_close(&opt);
   }
 
   if (env.fails) {
     fprintf(stderr, "%d failure(s)\n", env.fails);
     return 1;
   }
   printf("x64_inline_test: ok\n");
   return 0;
 }