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reloc_riscv64.c (8557B)


      1 /* RelocKind <-> RISC-V ELF reloc-type mapping.
      2  *
      3  * Mirror of elf_reloc_x86_64.c for the RISC-V LP64 ABI. The arch-
      4  * agnostic R_ABS / R_PC RelocKind entries fan out to the native
      5  * RISC-V codes; the RISC-V-specific encodings (HI20/LO12, BRANCH,
      6  * JAL, CALL, PCREL_*, TPREL_*, ADD/SUB/SET, RELAX, ALIGN, RVC_*)
      7  * live in the lower band as R_RV_*.
      8  *
      9  * Returning ELF_R_RISCV_NONE for an unsupported kind is the signal
     10  * to the caller to either panic (emit) or panic (read with diagnostic). */
     11 
     12 #include "obj/elf/elf.h"
     13 
     14 u32 elf_riscv64_reloc_to(u32 kind /* RelocKind */) {
     15   switch (kind) {
     16     case R_NONE:
     17       return ELF_R_RISCV_NONE;
     18     case R_ABS64:
     19       return ELF_R_RISCV_64;
     20     case R_ABS32:
     21       return ELF_R_RISCV_32;
     22     case R_PC32:
     23       return ELF_R_RISCV_32_PCREL;
     24     case R_RV_HI20:
     25       return ELF_R_RISCV_HI20;
     26     case R_RV_LO12_I:
     27       return ELF_R_RISCV_LO12_I;
     28     case R_RV_LO12_S:
     29       return ELF_R_RISCV_LO12_S;
     30     case R_RV_BRANCH:
     31       return ELF_R_RISCV_BRANCH;
     32     case R_RV_JAL:
     33       return ELF_R_RISCV_JAL;
     34     case R_RV_CALL:
     35       return ELF_R_RISCV_CALL;
     36     case R_PLT32:
     37       return ELF_R_RISCV_CALL_PLT;
     38     case R_RV_PCREL_HI20:
     39       return ELF_R_RISCV_PCREL_HI20;
     40     case R_RV_PCREL_LO12_I:
     41       return ELF_R_RISCV_PCREL_LO12_I;
     42     case R_RV_PCREL_LO12_S:
     43       return ELF_R_RISCV_PCREL_LO12_S;
     44     case R_RV_GOT_HI20:
     45       return ELF_R_RISCV_GOT_HI20;
     46     case R_RV_TLS_GOT_HI20:
     47       return ELF_R_RISCV_TLS_GOT_HI20;
     48     case R_RV_TPREL_HI20:
     49       return ELF_R_RISCV_TPREL_HI20;
     50     case R_RV_TPREL_LO12_I:
     51       return ELF_R_RISCV_TPREL_LO12_I;
     52     case R_RV_TPREL_LO12_S:
     53       return ELF_R_RISCV_TPREL_LO12_S;
     54     case R_RV_TPREL_ADD:
     55       return ELF_R_RISCV_TPREL_ADD;
     56     case R_ADD8:
     57       return ELF_R_RISCV_ADD8;
     58     case R_ADD16:
     59       return ELF_R_RISCV_ADD16;
     60     case R_ADD32:
     61       return ELF_R_RISCV_ADD32;
     62     case R_ADD64:
     63       return ELF_R_RISCV_ADD64;
     64     case R_SUB8:
     65       return ELF_R_RISCV_SUB8;
     66     case R_SUB16:
     67       return ELF_R_RISCV_SUB16;
     68     case R_SUB32:
     69       return ELF_R_RISCV_SUB32;
     70     case R_SUB64:
     71       return ELF_R_RISCV_SUB64;
     72     case R_RV_ALIGN:
     73       return ELF_R_RISCV_ALIGN;
     74     case R_RV_RVC_BRANCH:
     75       return ELF_R_RISCV_RVC_BRANCH;
     76     case R_RV_RVC_JUMP:
     77       return ELF_R_RISCV_RVC_JUMP;
     78     case R_RV_RELAX:
     79       return ELF_R_RISCV_RELAX;
     80     case R_SUB6:
     81       return ELF_R_RISCV_SUB6;
     82     case R_SET6:
     83       return ELF_R_RISCV_SET6;
     84     case R_ABS8:
     85       return ELF_R_RISCV_SET8;
     86     case R_ABS16:
     87       return ELF_R_RISCV_SET16;
     88     case R_SET_ULEB128:
     89       return ELF_R_RISCV_SET_ULEB128;
     90     case R_SUB_ULEB128:
     91       return ELF_R_RISCV_SUB_ULEB128;
     92     default:
     93       return ELF_R_RISCV_NONE;
     94   }
     95 }
     96 
     97 u32 elf_riscv64_reloc_from(u32 elf_type) {
     98   switch (elf_type) {
     99     case ELF_R_RISCV_NONE:
    100       return R_NONE;
    101     case ELF_R_RISCV_64:
    102       return R_ABS64;
    103     case ELF_R_RISCV_32:
    104       return R_ABS32;
    105     case ELF_R_RISCV_32_PCREL:
    106       return R_PC32;
    107     case ELF_R_RISCV_HI20:
    108       return R_RV_HI20;
    109     case ELF_R_RISCV_LO12_I:
    110       return R_RV_LO12_I;
    111     case ELF_R_RISCV_LO12_S:
    112       return R_RV_LO12_S;
    113     case ELF_R_RISCV_BRANCH:
    114       return R_RV_BRANCH;
    115     case ELF_R_RISCV_JAL:
    116       return R_RV_JAL;
    117     case ELF_R_RISCV_CALL:
    118       return R_RV_CALL;
    119     case ELF_R_RISCV_CALL_PLT:
    120       return R_PLT32;
    121     case ELF_R_RISCV_PCREL_HI20:
    122       return R_RV_PCREL_HI20;
    123     case ELF_R_RISCV_PCREL_LO12_I:
    124       return R_RV_PCREL_LO12_I;
    125     case ELF_R_RISCV_PCREL_LO12_S:
    126       return R_RV_PCREL_LO12_S;
    127     case ELF_R_RISCV_GOT_HI20:
    128       return R_RV_GOT_HI20;
    129     case ELF_R_RISCV_TLS_GOT_HI20:
    130       return R_RV_TLS_GOT_HI20;
    131     case ELF_R_RISCV_TPREL_HI20:
    132       return R_RV_TPREL_HI20;
    133     case ELF_R_RISCV_TPREL_LO12_I:
    134       return R_RV_TPREL_LO12_I;
    135     case ELF_R_RISCV_TPREL_LO12_S:
    136       return R_RV_TPREL_LO12_S;
    137     case ELF_R_RISCV_TPREL_ADD:
    138       return R_RV_TPREL_ADD;
    139     case ELF_R_RISCV_ADD8:
    140       return R_ADD8;
    141     case ELF_R_RISCV_ADD16:
    142       return R_ADD16;
    143     case ELF_R_RISCV_ADD32:
    144       return R_ADD32;
    145     case ELF_R_RISCV_ADD64:
    146       return R_ADD64;
    147     case ELF_R_RISCV_SUB8:
    148       return R_SUB8;
    149     case ELF_R_RISCV_SUB16:
    150       return R_SUB16;
    151     case ELF_R_RISCV_SUB32:
    152       return R_SUB32;
    153     case ELF_R_RISCV_SUB64:
    154       return R_SUB64;
    155     case ELF_R_RISCV_ALIGN:
    156       return R_RV_ALIGN;
    157     case ELF_R_RISCV_RVC_BRANCH:
    158       return R_RV_RVC_BRANCH;
    159     case ELF_R_RISCV_RVC_JUMP:
    160       return R_RV_RVC_JUMP;
    161     case ELF_R_RISCV_RELAX:
    162       return R_RV_RELAX;
    163     case ELF_R_RISCV_SUB6:
    164       return R_SUB6;
    165     case ELF_R_RISCV_SET6:
    166       return R_SET6;
    167     case ELF_R_RISCV_SET8:
    168       return R_ABS8;
    169     case ELF_R_RISCV_SET16:
    170       return R_ABS16;
    171     case ELF_R_RISCV_SET32:
    172       return R_ABS32;
    173     case ELF_R_RISCV_SET_ULEB128:
    174       return R_SET_ULEB128;
    175     case ELF_R_RISCV_SUB_ULEB128:
    176       return R_SUB_ULEB128;
    177     default:
    178       return (u32)-1; /* sentinel */
    179   }
    180 }
    181 
    182 /* Diagnostic spelling for a RISC-V ELF reloc *wire* type. XLEN-neutral —
    183  * shared by the rv64 and rv32 arch-ops descriptors. Returns a static
    184  * literal, or NULL for an unknown type. */
    185 const char* elf_riscv_reloc_name(u32 elf_type) {
    186   switch (elf_type) {
    187     case ELF_R_RISCV_NONE:
    188       return "R_RISCV_NONE";
    189     case ELF_R_RISCV_32:
    190       return "R_RISCV_32";
    191     case ELF_R_RISCV_64:
    192       return "R_RISCV_64";
    193     case ELF_R_RISCV_RELATIVE:
    194       return "R_RISCV_RELATIVE";
    195     case ELF_R_RISCV_COPY:
    196       return "R_RISCV_COPY";
    197     case ELF_R_RISCV_JUMP_SLOT:
    198       return "R_RISCV_JUMP_SLOT";
    199     case ELF_R_RISCV_IRELATIVE:
    200       return "R_RISCV_IRELATIVE";
    201     case ELF_R_RISCV_BRANCH:
    202       return "R_RISCV_BRANCH";
    203     case ELF_R_RISCV_JAL:
    204       return "R_RISCV_JAL";
    205     case ELF_R_RISCV_CALL:
    206       return "R_RISCV_CALL";
    207     case ELF_R_RISCV_CALL_PLT:
    208       return "R_RISCV_CALL_PLT";
    209     case ELF_R_RISCV_GOT_HI20:
    210       return "R_RISCV_GOT_HI20";
    211     case ELF_R_RISCV_TLS_GOT_HI20:
    212       return "R_RISCV_TLS_GOT_HI20";
    213     case ELF_R_RISCV_TLS_GD_HI20:
    214       return "R_RISCV_TLS_GD_HI20";
    215     case ELF_R_RISCV_PCREL_HI20:
    216       return "R_RISCV_PCREL_HI20";
    217     case ELF_R_RISCV_PCREL_LO12_I:
    218       return "R_RISCV_PCREL_LO12_I";
    219     case ELF_R_RISCV_PCREL_LO12_S:
    220       return "R_RISCV_PCREL_LO12_S";
    221     case ELF_R_RISCV_HI20:
    222       return "R_RISCV_HI20";
    223     case ELF_R_RISCV_LO12_I:
    224       return "R_RISCV_LO12_I";
    225     case ELF_R_RISCV_LO12_S:
    226       return "R_RISCV_LO12_S";
    227     case ELF_R_RISCV_TPREL_HI20:
    228       return "R_RISCV_TPREL_HI20";
    229     case ELF_R_RISCV_TPREL_LO12_I:
    230       return "R_RISCV_TPREL_LO12_I";
    231     case ELF_R_RISCV_TPREL_LO12_S:
    232       return "R_RISCV_TPREL_LO12_S";
    233     case ELF_R_RISCV_TPREL_ADD:
    234       return "R_RISCV_TPREL_ADD";
    235     case ELF_R_RISCV_ADD8:
    236       return "R_RISCV_ADD8";
    237     case ELF_R_RISCV_ADD16:
    238       return "R_RISCV_ADD16";
    239     case ELF_R_RISCV_ADD32:
    240       return "R_RISCV_ADD32";
    241     case ELF_R_RISCV_ADD64:
    242       return "R_RISCV_ADD64";
    243     case ELF_R_RISCV_SUB8:
    244       return "R_RISCV_SUB8";
    245     case ELF_R_RISCV_SUB16:
    246       return "R_RISCV_SUB16";
    247     case ELF_R_RISCV_SUB32:
    248       return "R_RISCV_SUB32";
    249     case ELF_R_RISCV_SUB64:
    250       return "R_RISCV_SUB64";
    251     case ELF_R_RISCV_ALIGN:
    252       return "R_RISCV_ALIGN";
    253     case ELF_R_RISCV_RVC_BRANCH:
    254       return "R_RISCV_RVC_BRANCH";
    255     case ELF_R_RISCV_RVC_JUMP:
    256       return "R_RISCV_RVC_JUMP";
    257     case ELF_R_RISCV_RELAX:
    258       return "R_RISCV_RELAX";
    259     case ELF_R_RISCV_SUB6:
    260       return "R_RISCV_SUB6";
    261     case ELF_R_RISCV_SET6:
    262       return "R_RISCV_SET6";
    263     case ELF_R_RISCV_SET8:
    264       return "R_RISCV_SET8";
    265     case ELF_R_RISCV_SET16:
    266       return "R_RISCV_SET16";
    267     case ELF_R_RISCV_SET32:
    268       return "R_RISCV_SET32";
    269     case ELF_R_RISCV_32_PCREL:
    270       return "R_RISCV_32_PCREL";
    271     case ELF_R_RISCV_SET_ULEB128:
    272       return "R_RISCV_SET_ULEB128";
    273     case ELF_R_RISCV_SUB_ULEB128:
    274       return "R_RISCV_SUB_ULEB128";
    275     default:
    276       return NULL;
    277   }
    278 }
    279 
    280 /* Decode the float ABI from RISC-V ELF e_flags (EF_RISCV_FLOAT_ABI_*).
    281  * XLEN-neutral — shared by the rv64 and rv32 arch-ops descriptors. */
    282 KitFloatAbi elf_riscv_float_abi_from_e_flags(u32 e_flags) {
    283   switch (e_flags & EF_RISCV_FLOAT_ABI_MASK) {
    284     case EF_RISCV_FLOAT_ABI_SOFT:
    285       return KIT_FLOAT_ABI_SOFT;
    286     case EF_RISCV_FLOAT_ABI_SINGLE:
    287       return KIT_FLOAT_ABI_SINGLE;
    288     case EF_RISCV_FLOAT_ABI_DOUBLE:
    289     case EF_RISCV_FLOAT_ABI_QUAD:
    290       return KIT_FLOAT_ABI_DOUBLE;
    291     default:
    292       return KIT_FLOAT_ABI_DEFAULT;
    293   }
    294 }