tlv_thunk_aarch64.S (3406B)
1 /* The Mach-O TLV thunk for the JIT path. 2 * 3 * Called via: 4 * ldr x1, [x0] ; x0 = descriptor, x1 = thunk addr 5 * blr x1 6 * with the contract "x0 in/out as descriptor -> TLV addr, every other 7 * GPR/SIMD register preserved". No C frame at entry: the access 8 * sequence is mid-expression in JITed code, so we must save and restore 9 * everything caller-saved before/after calling out to the host 10 * `get_block` helper. 11 * 12 * See src/jit/tlv_thunk.h for the descriptor layout and ctx contract. */ 13 14 #if defined(__aarch64__) 15 16 .text 17 .p2align 2 18 .globl _kit_jit_tlv_thunk 19 .globl kit_jit_tlv_thunk 20 _kit_jit_tlv_thunk: 21 kit_jit_tlv_thunk: 22 /* Frame layout (544 bytes, 16-byte aligned): 23 * sp+ 0 .. sp+127 : x1-x16 (eight stp pairs) 24 * sp+128 : x17 25 * sp+136 : scratch slot for descriptor pointer 26 * sp+144 : x29 (FP) 27 * sp+152 : x30 (LR) 28 * sp+160 .. sp+543 : v0-v7, v16-v31 (24 q regs) 29 * 30 * x18 is platform-reserved on Apple aarch64 (don't touch). v8-v15 31 * are callee-saved by ABI so the host's get_block won't perturb 32 * them; we skip them. */ 33 sub sp, sp, #544 34 35 stp x1, x2, [sp, # 0] 36 stp x3, x4, [sp, # 16] 37 stp x5, x6, [sp, # 32] 38 stp x7, x8, [sp, # 48] 39 stp x9, x10, [sp, # 64] 40 stp x11, x12, [sp, # 80] 41 stp x13, x14, [sp, # 96] 42 stp x15, x16, [sp, #112] 43 str x17, [sp, #128] 44 45 stp x29, x30, [sp, #144] 46 add x29, sp, #144 47 48 stp q0, q1, [sp, #160] 49 stp q2, q3, [sp, #192] 50 stp q4, q5, [sp, #224] 51 stp q6, q7, [sp, #256] 52 stp q16, q17, [sp, #288] 53 stp q18, q19, [sp, #320] 54 stp q20, q21, [sp, #352] 55 stp q22, q23, [sp, #384] 56 stp q24, q25, [sp, #416] 57 stp q26, q27, [sp, #448] 58 stp q28, q29, [sp, #480] 59 stp q30, q31, [sp, #512] 60 61 /* Stash desc; we'll need [desc + 16] (the byte offset) after the 62 * call, but the call clobbers x0. */ 63 str x0, [sp, #136] 64 65 /* ctx = *(desc + 8); get_block = *ctx. */ 66 ldr x1, [x0, #8] 67 ldr x16, [x1] 68 69 /* x0 = ctx, call get_block(ctx) -> x0 = block base. */ 70 mov x0, x1 71 blr x16 72 73 /* x0 = base; load offset and combine. */ 74 ldr x1, [sp, #136] 75 ldr x1, [x1, #16] 76 add x0, x0, x1 77 78 /* Restore SIMD. */ 79 ldp q0, q1, [sp, #160] 80 ldp q2, q3, [sp, #192] 81 ldp q4, q5, [sp, #224] 82 ldp q6, q7, [sp, #256] 83 ldp q16, q17, [sp, #288] 84 ldp q18, q19, [sp, #320] 85 ldp q20, q21, [sp, #352] 86 ldp q22, q23, [sp, #384] 87 ldp q24, q25, [sp, #416] 88 ldp q26, q27, [sp, #448] 89 ldp q28, q29, [sp, #480] 90 ldp q30, q31, [sp, #512] 91 92 /* Restore FP/LR and GPRs (last so the temps we used above don't 93 * leak out). */ 94 ldp x29, x30, [sp, #144] 95 96 ldp x1, x2, [sp, # 0] 97 ldp x3, x4, [sp, # 16] 98 ldp x5, x6, [sp, # 32] 99 ldp x7, x8, [sp, # 48] 100 ldp x9, x10, [sp, # 64] 101 ldp x11, x12, [sp, # 80] 102 ldp x13, x14, [sp, # 96] 103 ldp x15, x16, [sp, #112] 104 ldr x17, [sp, #128] 105 106 add sp, sp, #544 107 ret 108 109 #if defined(__linux__) && defined(__ELF__) 110 .section .note.GNU-stack,"",%progbits 111 #endif 112 113 #endif /* __aarch64__ */