kit

native_asm.c (7241B)

---

 #include "cg/native_asm.h"
 
 #include "arch/mc.h"
 #include "asm/asm.h"
 #include "asm/asm_lex.h"
 #include "core/pool.h" /* pool_slice for native_asm_resolve_pin */
 
 void native_file_scope_asm(NativeTarget* t, const char* src, size_t len) {
   AsmLexer* lex = asm_lex_open_mem(t->c, "<file-scope-asm>", src, len);
   asm_parse(t->c, lex, t->mc);
   asm_lex_close(lex);
 }
 
 void native_finalize(NativeTarget* t) {
   if (t->mc) mc_emit_eh_frame(t->mc);
 }
 
 const char* native_asm_constraint_body(const char* s) {
   if (!s) return "";
   if (s[0] == '=' && s[1] == '&') return s + 2;
   if (s[0] == '=' || s[0] == '+' || s[0] == '&') return s + 1;
   return s;
 }
 
 int native_asm_constraint_early(const char* s) {
   if (!s) return 0;
   return (s[0] == '=' && s[1] == '&') || s[0] == '&';
 }
 
 int native_asm_match_index(const char* s) {
   int n = 0;
   const char* p;
   if (!s || s[0] < '0' || s[0] > '9') return -1;
   for (p = s; *p >= '0' && *p <= '9'; ++p) n = n * 10 + (*p - '0');
   return n;
 }
 
 void native_asm_abi_clobber_masks(NativeTarget* t, u32 abi_sets, u32* int_mask,
                                   u32* fp_mask) {
   *int_mask = 0;
   *fp_mask = 0;
   if (abi_sets & KIT_CG_ASM_CLOBBER_ABI_CALLER_SAVED) {
     *int_mask |= native_target_caller_saved_mask(t, NATIVE_REG_INT);
     *fp_mask |= native_target_caller_saved_mask(t, NATIVE_REG_FP);
   }
   if (abi_sets & KIT_CG_ASM_CLOBBER_ABI_CALLEE_SAVED) {
     *int_mask |= native_target_callee_saved_mask(t, NATIVE_REG_INT);
     *fp_mask |= native_target_callee_saved_mask(t, NATIVE_REG_FP);
   }
 }
 
 int native_asm_constraint_reg_class(const char* constraint,
                                     NativeAllocClass* cls_out) {
   const char* body = native_asm_constraint_body(constraint);
   if (!body || !body[0]) return 0;
   if (body[0] == 'r') {
     if (cls_out) *cls_out = NATIVE_REG_INT;
     return 1;
   }
   if (body[0] == 'f' || body[0] == 'x' || body[0] == 'w') {
     if (cls_out) *cls_out = NATIVE_REG_FP;
     return 1;
   }
   return 0;
 }
 
 static int native_asm_default_operand_reg_ok(const NativeRegInfo* ri,
                                              NativeAllocClass cls, Reg reg) {
   if (!ri || cls >= ri->nclasses) return 0;
   const NativeAllocClassInfo* ci = &ri->classes[cls];
   for (u32 i = 0; i < ci->nphys; ++i) {
     const NativePhysRegInfo* pi = &ci->phys[i];
     if (pi->reg != reg) continue;
     return (pi->flags & NATIVE_REG_RESERVED) == 0;
   }
   return 0;
 }
 
 int native_asm_constraint_reg_info(NativeTarget* t, const char* constraint,
                                    NativeAsmConstraintInfo* out) {
   NativeAsmConstraintInfo info;
   const char* body = native_asm_constraint_body(constraint);
   memset(&info, 0, sizeof info);
   info.fixed_reg = REG_NONE;
   if (!body || !body[0]) return 0;
   if (t && t->regs && t->regs->asm_constraint_reg) {
     Reg fixed = REG_NONE;
     NativeAllocClass cls = NATIVE_REG_INT;
     u32 allowed_mask = 0;
     if (t->regs->asm_constraint_reg(t->regs, body, &cls, &fixed,
                                     &allowed_mask)) {
       if (allowed_mask) {
         u32 filtered = 0;
         for (Reg r = 0; r < 32; ++r) {
           if ((allowed_mask & (1u << r)) == 0) continue;
           if (t->regs->asm_operand_reg_ok) {
             if (!t->regs->asm_operand_reg_ok(t->regs, cls, r)) continue;
           } else if (!native_asm_default_operand_reg_ok(t->regs, cls, r)) {
             continue;
           }
           filtered |= 1u << r;
         }
         allowed_mask = filtered;
         if (!allowed_mask) return 0;
       }
       if (fixed != REG_NONE) {
         if (t->regs->asm_operand_reg_ok) {
           if (!t->regs->asm_operand_reg_ok(t->regs, cls, fixed)) return 0;
         } else if (!native_asm_default_operand_reg_ok(t->regs, cls, fixed)) {
           return 0;
         }
         if (fixed >= 32) return 0;
         if (allowed_mask && (allowed_mask & (1u << fixed)) == 0) return 0;
       }
       info.cls = cls;
       info.fixed_reg = fixed;
       info.allowed_mask = allowed_mask;
       if (out) *out = info;
       return 1;
     }
     return 0;
   }
   if (!native_asm_constraint_reg_class(constraint, &info.cls)) return 0;
   if (out) *out = info;
   return 1;
 }
 
 int native_asm_constraint_is_reg(NativeTarget* t, const char* constraint) {
   return native_asm_constraint_reg_info(t, constraint, NULL);
 }
 
 NativeAsmRegPinStatus native_asm_resolve_pin(NativeTarget* t, Sym reg,
                                              const char* constraint,
                                              NativeAsmRegPin* out) {
   Reg r;
   NativeAllocClass cls;
   NativeAsmConstraintInfo info;
   if (!reg) return NATIVE_ASM_REG_PIN_ABSENT;
   if (!t || !t->regs || !t->regs->resolve_name)
     return NATIVE_ASM_REG_PIN_UNKNOWN;
   if (t->regs->resolve_name(t->regs, pool_slice(t->c->global, reg), &r, &cls) !=
       0)
     return NATIVE_ASM_REG_PIN_UNKNOWN;
   if (t->regs->asm_operand_reg_ok) {
     if (!t->regs->asm_operand_reg_ok(t->regs, cls, r))
       return NATIVE_ASM_REG_PIN_FORBIDDEN;
   } else if (!native_asm_default_operand_reg_ok(t->regs, cls, r)) {
     return NATIVE_ASM_REG_PIN_FORBIDDEN;
   }
   if (!native_asm_constraint_reg_info(t, constraint, &info))
     return NATIVE_ASM_REG_PIN_BAD_CONSTRAINT;
   if (info.cls != cls) return NATIVE_ASM_REG_PIN_CLASS_MISMATCH;
   if (info.fixed_reg != REG_NONE && info.fixed_reg != r)
     return NATIVE_ASM_REG_PIN_FIXED_MISMATCH;
   if (info.allowed_mask && (r >= 32 || (info.allowed_mask & (1u << r)) == 0))
     return NATIVE_ASM_REG_PIN_FIXED_MISMATCH;
   if (out) {
     out->reg = r;
     out->cls = cls;
   }
   return NATIVE_ASM_REG_PIN_OK;
 }
 
 NativeAsmPinnedLoc native_asm_prepare_pinned_loc(NativeTarget* t, Sym reg,
                                                  const char* constraint,
                                                  KitCgTypeId type,
                                                  NativeLoc loc) {
   NativeAsmPinnedLoc out;
   NativeAsmRegPin pin;
   memset(&out, 0, sizeof out);
   out.loc = loc;
   out.pin_status = native_asm_resolve_pin(t, reg, constraint, &pin);
   if (out.pin_status == NATIVE_ASM_REG_PIN_ABSENT) return out;
   out.has_pin = 1u;
   if (out.pin_status != NATIVE_ASM_REG_PIN_OK) return out;
   if (loc.kind != NATIVE_LOC_REG) {
     out.loc = native_loc_reg(type, pin.cls, pin.reg);
     out.needs_stage = 1u;
     return out;
   }
   if ((Reg)loc.v.reg != pin.reg || (NativeAllocClass)loc.cls != pin.cls)
     out.wrong_reg = 1u;
   return out;
 }
 
 const char* native_asm_pin_status_message(NativeAsmRegPinStatus st) {
   switch (st) {
     case NATIVE_ASM_REG_PIN_ABSENT:
       return "no hard register pin";
     case NATIVE_ASM_REG_PIN_OK:
       return "hard register pin resolved";
     case NATIVE_ASM_REG_PIN_UNKNOWN:
       return "unknown asm register variable name";
     case NATIVE_ASM_REG_PIN_FORBIDDEN:
       return "asm register variable names an unsupported register";
     case NATIVE_ASM_REG_PIN_BAD_CONSTRAINT:
       return "asm register variable requires a register constraint";
     case NATIVE_ASM_REG_PIN_CLASS_MISMATCH:
       return "asm register variable class does not match its constraint";
     case NATIVE_ASM_REG_PIN_FIXED_MISMATCH:
       return "asm register variable conflicts with register constraint";
   }
   return "invalid asm register variable";
 }