kit

arm32_thumb1.c (7023B)

---

 /*
  * lib/coro/arm32_thumb1.c -- ARMv6-M (Cortex-M0 / M0+, Thumb-1) impls of
  *   setjmp / longjmp                       (<setjmp.h>)
  *   __kit_coro_ctx_init / __kit_coro_switch / trampoline   (<kit/coro.h>)
  *
  * Thumb-1 / ARMv6-M is a strict subset of the Thumb-2 ISA used by the
  * sibling arm32.c, and several conveniences disappear:
  *
  *   - no IT blocks: conditional execution must use a forward branch.
  *   - data-processing ops are restricted to r0-r7. r8-r15 are reachable
  *     only via the `mov` high-register form and a few specials; in
  *     particular there is no `str rN, [sp,...]` / `str sp, [rN,...]`.
  *   - `mov rd, rm` with *both* operands low is UNPREDICTABLE in
  *     ARMv6-M; use the T2 flags-setting form `movs rd, rm` for low->low
  *     register copies. The plain `mov` form is reserved for cases where
  *     at least one operand is a high register (sp/lr/r8-r11).
  *   - no VFP coprocessor on M0/M0+, so no fp_regs slots.
  *
  * Layout: 10 GPR slots (r4-r11, sp, lr) = 40 bytes, padded to 16-byte
  * alignment by alignof(16). Fits in the 256-byte storage carved out by
  * jmp_buf and coro_ctx.
  *
  * SAVE_INTO uses r4-r7 as scratches *after* they have themselves been
  * stored, so r0-r3 are never clobbered. That matters for __kit_coro_switch:
  * `to` (r1) and `value` (r2) survive across the save half and are still
  * live for the restore half / value delivery.
  */
 
 #include <kit/coro.h>
 #include <setjmp.h>
 #include <stddef.h>
 #include <stdint.h>
 
 struct __kit_arm32_thumb1_ctx {
   uintptr_t regs[10];
 } __attribute__((aligned(16)));
 
 _Static_assert(sizeof(struct __kit_arm32_thumb1_ctx) == 48, "layout");
 _Static_assert(_Alignof(struct __kit_arm32_thumb1_ctx) == 16, "align");
 _Static_assert(sizeof(struct __kit_arm32_thumb1_ctx) <= sizeof(coro_ctx),
                "fits coro_ctx");
 _Static_assert(sizeof(struct __kit_arm32_thumb1_ctx) <= sizeof(jmp_buf),
                "fits jmp_buf");
 _Static_assert(_Alignof(coro_ctx) >= _Alignof(struct __kit_arm32_thumb1_ctx),
                "align coro_ctx");
 
 extern void __kit_coro_trampoline(void);
 
 void __kit_coro_ctx_init(coro_ctx* ctx, void* stack_base, size_t stack_len,
                          void (*entry)(uintptr_t)) {
   struct __kit_arm32_thumb1_ctx* c = (struct __kit_arm32_thumb1_ctx*)ctx;
 
   /* ARM stacks grow down; align top to 16 (AAPCS public-boundary
      requirement is 8, but coro stacks promise CORO_STACK_ALIGN=16). */
   uintptr_t top = (uintptr_t)stack_base + stack_len;
   top &= ~(uintptr_t)(CORO_STACK_ALIGN - 1);
 
   for (size_t i = 0; i < sizeof(*c) / sizeof(uintptr_t); ++i)
     ((uintptr_t*)c)[i] = 0;
 
   c->regs[0] = (uintptr_t)entry;                 /* r4 -- entry fn */
   c->regs[3] = 0;                                /* r7 -- frame ptr */
   c->regs[8] = top;                              /* sp */
   c->regs[9] = (uintptr_t)__kit_coro_trampoline; /* lr */
 }
 
 #define STR_(x) #x
 #define STR(x) STR_(x)
 #define SYM(n) STR(__USER_LABEL_PREFIX__) #n
 
 /* Save callee-saved state into [reg].
    Stage 1: store r4-r7 directly (low->low str is fine).
    Stage 2: with r4-r7 already saved, reuse them as scratches to copy
             the high regs r8-r11 down and store them.
    Stage 3: same trick for sp and lr.
    r0-r3 are never touched. */
 #define SAVE_INTO(reg)  \
   "    str  r4,  [" reg \
   ", #0]\n"             \
   "    str  r5,  [" reg \
   ", #4]\n"             \
   "    str  r6,  [" reg \
   ", #8]\n"             \
   "    str  r7,  [" reg \
   ", #12]\n"            \
   "    mov  r4,  r8\n"  \
   "    mov  r5,  r9\n"  \
   "    mov  r6,  r10\n" \
   "    mov  r7,  r11\n" \
   "    str  r4,  [" reg \
   ", #16]\n"            \
   "    str  r5,  [" reg \
   ", #20]\n"            \
   "    str  r6,  [" reg \
   ", #24]\n"            \
   "    str  r7,  [" reg \
   ", #28]\n"            \
   "    mov  r4,  sp\n"  \
   "    mov  r5,  lr\n"  \
   "    str  r4,  [" reg \
   ", #32]\n"            \
   "    str  r5,  [" reg ", #36]\n"
 
 /* Restore callee-saved state from [reg]. Mirror image: load r8-r11/sp/lr
    first via r4-r7 as scratches, then restore the real r4-r7 last. */
 #define RESTORE_FROM(reg) \
   "    ldr  r4,  [" reg   \
   ", #16]\n"              \
   "    ldr  r5,  [" reg   \
   ", #20]\n"              \
   "    ldr  r6,  [" reg   \
   ", #24]\n"              \
   "    ldr  r7,  [" reg   \
   ", #28]\n"              \
   "    mov  r8,  r4\n"    \
   "    mov  r9,  r5\n"    \
   "    mov  r10, r6\n"    \
   "    mov  r11, r7\n"    \
   "    ldr  r4,  [" reg   \
   ", #32]\n"              \
   "    ldr  r5,  [" reg   \
   ", #36]\n"              \
   "    mov  sp,  r4\n"    \
   "    mov  lr,  r5\n"    \
   "    ldr  r4,  [" reg   \
   ", #0]\n"               \
   "    ldr  r5,  [" reg   \
   ", #4]\n"               \
   "    ldr  r6,  [" reg   \
   ", #8]\n"               \
   "    ldr  r7,  [" reg ", #12]\n"
 
 __asm__ (
     ".syntax unified\n"
     ".thumb\n"
     ".text\n"
     ".align 2\n"
 
     /* setjmp(env) -- env in r0. lr at call time is the return address
        into the caller, exactly what longjmp must restore. */
     ".weak " SYM(setjmp) "\n"
     ".thumb_func\n"
     ".type " SYM(setjmp) ", %function\n"
     SYM(setjmp) ":\n"
     SAVE_INTO("r0")
     "    movs r0, #0\n"
     "    bx   lr\n"
 
     /* longjmp(env, val) -- env in r0, val in r1.
        longjmp(_, 0) must deliver 1 (C11 7.13.2.1p4). No IT blocks in
        Thumb-1, so use a forward branch for the substitution.
        Both `r0 <- r1` and the immediate ops use the T2 (`movs`) form
        since plain `mov rd, rm` with both low operands is UNPREDICTABLE
        on ARMv6-M. */
     ".weak " SYM(longjmp) "\n"
     ".thumb_func\n"
     ".type " SYM(longjmp) ", %function\n"
     SYM(longjmp) ":\n"
     RESTORE_FROM("r0")
     "    cmp  r1, #0\n"
     "    bne  1f\n"
     "    movs r1, #1\n"
     "1:\n"
     "    movs r0, r1\n"
     "    bx   lr\n"
 
     /* __kit_coro_switch(from, to, value) -- r0=from, r1=to, r2=value.
        SAVE_INTO leaves r0-r3 untouched, so r1 (to) and r2 (value) are
        still live. RESTORE_FROM clobbers r4-r7 freely (they belong to
        the resumed coro). The lr loaded by RESTORE_FROM is either a
        real return address (a previously-suspended coro) or
        __kit_coro_trampoline (a fresh coro initialized by __kit_coro_ctx_init);
        either way `bx lr` lands there with r0 holding `value`. */
     ".globl " SYM(__kit_coro_switch) "\n"
     ".thumb_func\n"
     ".type " SYM(__kit_coro_switch) ", %function\n"
     SYM(__kit_coro_switch) ":\n"
     SAVE_INTO("r0")
     RESTORE_FROM("r1")
     "    movs r0, r2\n"
     "    bx   lr\n"
 
     /* __kit_coro_trampoline -- on first entry r0 = value (delivered
        by __kit_coro_switch's `movs r0, r2`), r4 = entry fn (set by __kit_coro_ctx_init),
        sp aligned to 16. UDF #0 (T1, ARMv6-M) traps if entry returns. */
     ".globl " SYM(__kit_coro_trampoline) "\n"
     ".thumb_func\n"
     ".type " SYM(__kit_coro_trampoline) ", %function\n"
     SYM(__kit_coro_trampoline) ":\n"
     "    blx  r4\n"
     "    udf  #0\n"
 
     ".section .note.GNU-stack,\"\",%progbits\n"
 );