kit

kit
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icache_x86.c (484B)

      1 /* x86 / x86_64 icache: a no-op. x86 instruction fetches are coherent with
      2  * stores from the same core (the architecture spec mandates self-modifying
      3  * code visibility on the next branch / serializing instruction). The JIT
      4  * dispatch back to generated code is always a return / call from a
      5  * different function, which is a sufficient serialization point. */
      6 
      7 #include <stddef.h>
      8 
      9 #include "env_internal.h"
     10 
     11 void env_flush_icache(void* addr, size_t n) {
     12   (void)addr;
     13   (void)n;
     14 }