riscv64-cvt-int-narrow.after (690B)
1 #if defined(TCC_TARGET_RISCV64) 2 } else if ((dbt & VT_BTYPE) == VT_INT && 3 ((sbt & VT_BTYPE) == VT_LLONG || 4 (sbt & VT_BTYPE) == VT_PTR || 5 (sbt & VT_BTYPE) == VT_FUNC)) { 6 /* RV64 keeps every 32-bit register value sign-extended, 7 including unsigned int. A cast from a 64-bit register 8 must actually discard bits 63:32; relabelling alone lets 9 those bits affect a following 64-bit SLT/SLTU. */ 10 gv(RC_INT); 11 vtop->type.t = VT_INT; 12 gen_cvt_sxtw(); 13 #endif 14 } else if (dbt == VT_BOOL) {